Filters: meson ×
The percentages indicate the number of devices supporting the format and modifier. For instance, "50%" in the column for the "i915" driver would mean that half the known Intel devices support that format and modifier.
Modifier | Format | Planes | Drivers | |
---|---|---|---|---|
overlay | primary | meson | ||
LINEAR | YUV411 | 100% | 0% | 100% |
LINEAR | NV21 | 100% | 0% | 100% |
LINEAR | YUV420 | 100% | 0% | 100% |
LINEAR | NV12 | 100% | 0% | 100% |
LINEAR | ABGR8888 | 0% | 100% | 100% |
LINEAR | XBGR8888 | 0% | 100% | 100% |
LINEAR | RGB888 | 0% | 100% | 100% |
LINEAR | ARGB8888 | 0% | 100% | 100% |
LINEAR | XRGB8888 | 0% | 100% | 100% |
LINEAR | YUV444 | 100% | 0% | 100% |
LINEAR | RGB565 | 0% | 100% | 100% |
LINEAR | YUV422 | 100% | 0% | 100% |
LINEAR | YUV410 | 100% | 0% | 100% |
LINEAR | YUYV | 100% | 0% | 100% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | XBGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | RGB888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | ARGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | XRGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPARSE) | RGB565 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, YTR, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, YTR, SPARSE) | XBGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | XBGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | RGB888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | ARGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | XRGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) | RGB565 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | XBGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | RGB888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | ARGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | XRGB8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, SPLIT, SPARSE) | RGB565 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | XBGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, YTR, SPLIT, SPARSE) | ABGR8888 | 0% | 33% | 33% |
ARM_AFBC(BLOCK_SIZE = 32x8, YTR, SPLIT, SPARSE) | XBGR8888 | 0% | 33% | 33% |
AMLOGIC_FBC(layout = BASIC, options = 0) | YUV420_10BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = BASIC, options = 0) | YUV420_8BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = SCATTER, options = 0) | YUV420_10BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = SCATTER, options = 0) | YUV420_8BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = BASIC, options = MEM_SAVING) | YUV420_10BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = BASIC, options = MEM_SAVING) | YUV420_8BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = SCATTER, options = MEM_SAVING) | YUV420_10BIT | 67% | 0% | 67% |
AMLOGIC_FBC(layout = SCATTER, options = MEM_SAVING) | YUV420_8BIT | 67% | 0% | 67% |