LINEAR |
BGR888 |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
100% |
ARM_AFBC(BLOCK_SIZE = 16x16) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPLIT, SPARSE) |
BGR888 |
7% |
6% |
0% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 32x8, YTR, SPLIT, SPARSE) |
BGR888 |
7% |
6% |
0% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, CBR) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |
ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) |
BGR888 |
7% |
0% |
0% |
0% |
0% |
0% |
0% |
100% |
0% |
0% |
0% |
0% |
0% |