Filters: rockchip ×
The percentages indicate the number of devices supporting the format and modifier. For instance, "50%" in the column for the "i915" driver would mean that half the known Intel devices support that format and modifier.
| Modifier | Format | Planes | Drivers | ||
|---|---|---|---|---|---|
| overlay | primary | cursor | rockchip | ||
| LINEAR | Y210 | 100% | 0% | 0% | 100% |
| LINEAR | YUV420_10BIT | 100% | 0% | 0% | 100% |
| LINEAR | unknown | 100% | 100% | 100% | 100% |
| LINEAR | ABGR2101010 | 100% | 0% | 0% | 100% |
| LINEAR | XBGR2101010 | 100% | 0% | 0% | 100% |
| LINEAR | ARGB2101010 | 100% | 0% | 0% | 100% |
| LINEAR | XRGB2101010 | 100% | 0% | 0% | 100% |
| LINEAR | unknown | 100% | 100% | 100% | 100% |
| LINEAR | NV21 | 100% | 100% | 100% | 100% |
| LINEAR | NV61 | 100% | 100% | 100% | 100% |
| LINEAR | NV12 | 100% | 100% | 100% | 100% |
| LINEAR | NV42 | 100% | 100% | 100% | 100% |
| LINEAR | ABGR8888 | 100% | 100% | 100% | 100% |
| LINEAR | XBGR8888 | 100% | 100% | 100% | 100% |
| LINEAR | BGR888 | 100% | 100% | 100% | 100% |
| LINEAR | RGB888 | 100% | 100% | 100% | 100% |
| LINEAR | ARGB8888 | 100% | 100% | 100% | 100% |
| LINEAR | XRGB8888 | 100% | 100% | 100% | 100% |
| LINEAR | NV24 | 100% | 100% | 100% | 100% |
| LINEAR | NV15 | 100% | 100% | 100% | 100% |
| LINEAR | BGR565 | 100% | 100% | 100% | 100% |
| LINEAR | RGB565 | 100% | 100% | 100% | 100% |
| LINEAR | NV16 | 100% | 100% | 100% | 100% |
| LINEAR | YUV420_8BIT | 100% | 0% | 0% | 100% |
| LINEAR | YVYU | 100% | 100% | 100% | 100% |
| LINEAR | YUYV | 100% | 100% | 100% | 100% |
| LINEAR | VYUY | 100% | 100% | 100% | 100% |
| LINEAR | UYVY | 100% | 100% | 100% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPLIT, SPARSE) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, CBR) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, CBR) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, SPARSE, CBR) | YUYV | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | Y210 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | YUV420_10BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | ABGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | XBGR2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | ARGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | XRGB2101010 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | ABGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | XBGR8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | BGR888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | RGB888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | ARGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | XRGB8888 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | BGR565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | RGB565 | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | YUV420_8BIT | 100% | 0% | 0% | 100% |
| ARM_AFBC(BLOCK_SIZE = 16x16, YTR, SPARSE, CBR) | YUYV | 100% | 0% | 0% | 100% |